This is the preserved pre-rebuild source library. For the current governed claim and source ledger, visit Sources.
Sources
Source Notes
The centralized paper trail for manufacturing claims, roadmap notes, industry context, and original asset policy.
Last updated June 2, 2026.
Source Notes
Every claim has a paper trail.
All visuals are original CSS and SVG created for this project. No external photos, logos, audio, fonts, scripts, trackers, or stock assets are used.
Annotated source library
Lineage
Supports the historical relay: transistor invention, planar manufacturing, integrated circuits, VLSI design, microprocessors, the foundry model, and FinFET origins.
Process, tools, and packaging
Supports the manufacturing walkthrough: lithography, etch, materials engineering, advanced packaging, chiplets, HBM, and system integration.
- ASML: semiconductor manufacturing process steps
- ASML: lithography principles
- ASML: High-NA EUV
- ASML: TWINSCAN EXE:5200B High-NA EUV system
- Lam Research: selective etch
- Applied Materials: selective processes
- TSMC: 3DFabric advanced packaging
- Intel: advanced packaging
- Micron: HBM4 overview and 2048 I/O
Roadmap-sensitive notes
Supports current roadmap references. Last updated June 2, 2026.
- TSMC: N2 nanosheet technology
- TSMC: A16 and Super Power Rail
- TSMC: 2026 North America Technology Symposium, A13, A12, N2U, and CoWoS roadmap notes
- TSMC: 2026 annual meeting agenda with N2, N2P, and A16 roadmap notes
- Intel Foundry: Intel 18A, RibbonFET, PowerVia
- Intel Foundry: process portfolio and PowerVia/RibbonFET overview
- Intel Newsroom: PowerVia backside power delivery
- Samsung: 3 nm GAA and MBCFET
- imec: scaling beyond 2 nm
- UCIe Consortium: chiplet interconnect specifications
- Infineon: 300 mm power GaN wafer technology
- Broadcom: co-packaged optics reliability milestone
- Intel Newsroom: Tunnel Falls silicon spin qubit chip
Industry context
Supports the economic, workforce, environmental, export-control, and industrial-policy context around fab capacity.
- U.S. Department of Commerce: TSMC Arizona CHIPS award
- SIA: CHIPS incentives, investment, and supply-chain resilience
- SIA and Oxford Economics: workforce gap
- SEMI: industry scale and workforce needs
- TSMC Arizona: site, water reclamation, and local operating context
- European Court of Auditors: EU microchips strategy special report
- Rapidus: Chitose IIM pilot line and funding updates
- imec: environmental impact in chip manufacturing
- SEMI: PFAS in semiconductor manufacturing
- SEMI: PFAS regulations for semiconductor manufacturing
- ECHA: PFAS draft-opinion consultation timing
- McKinsey: semiconductor industry outlook
- U.S. BIS: revised licensing policy for advanced semiconductors
- Council on Foreign Relations: U.S. AI-chip export policy analysis
- IEEE Spectrum: Natcast funding dispute